Index
Annotated List
Hierarchy
Deep Hierarchy
Package Documentation
Files
entity DelayLine
More...
Sourcefile...
Used Packages
IEEE.Std_logic_1164
all
IEEE.NUMERIC_STD
all
Generics
n_halfcycles
integer := 2
Ports
x
in std_logic_vector
x_delayed
out std_logic_vector
clk
in std_logic
Architectures
xx
Generated by: taurokc@dsy-srv3 on Fri Aug 25 11:56:55 2006.