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entity MipIsoAUMip And Iso Assignment Unit (the whole chip). |
Copied from MipIsoAU.vhd revision 1.16 from 2005/02/02 Contains Spy memories to monitor data from PSB board and as in original version Sim memories to simulate MIP and ISO bits for all 16 muons Timing on chip: ------------------------------------------------------- | ------------------------------------ | ___| | MIAUPhiProUnit| | | || | -------- -------- -------- | | | ||*|*|Eta |**|Phi |***|Phi | | | |^|| |*|Conv | |Pro 1 | |Pro 2 | | | IFF| |*|LUT | |LUT | |LUT | | | | |*|-async| | | | | | | | |*-------- | | | | | | | |* | | | | | | | |***********| | | |****** | | |* | ^| | | |* | | |* -------- | ^| |* /----------\ | | |**********************-------- |**| | | | ------------------------------------ | logic ***|** | ****| | | * ___ | * \*---------* | * | | | -------- * *** | **| | ___| |Eta | * * | |^| | ||************************|Pro |**** * | OFF | || |LUT | * | |^|| | | * | IFF| | | * | | | ^| * | | -------- * | -------------------------------------------------------- * ___ ___ * | | | | * | |*****************************| |******** |^| |-| **|^| IFF MIP | |******* |^| IFF ISO clock: ^ | ^ ^ | v | |
instance indices are 0 to 3 in each chip 0: MIP DT/CSC 1: MIP RPC 2: ISO DT/CSC 3: ISO RPC PSB sends MIP/QUIET bits at a 80 MHz rate, therefore MIP bits are taken with rising clk edge QUIET bits are taken with falling clk edge XC2V3000 contains 96 RAMblocks 18k