Index
Annotated List
Hierarchy
Deep Hierarchy
Package Documentation
Files
architecture behavioral
More...
Sourcefile...
Entity
MipIsoAU
Instantiated Components
the_MQReceiver
MIAUMQReceiver
The MIP and Quiet bit receiver logic
DTCSCMIPUnit
MIAUSingleAssUnit
RPCMIPUnit
MIAUSingleAssUnit
DTCSCISOUnit
MIAUSingleAssUnit
RPCISOUnit
MIAUSingleAssUnit
ChipID
ChipIDRegisters
Chip ID and Revision
dummy_register
VMEStatusReg
Dummy register
bxcounter
BXCounter
BX counter (only the synchronization logic is used. the counter output is not used)
simu_logic
MIAUSimuLogic
Simulation Logic
vme_logic
InChipVMELogic
VME Logic
startup_dcm
StartupDCMVirtex2
Digital Clock Management & Chip Startup
the_MQReceiver
MIAUMQReceiver
The MIP and Quiet bit receiver logic
dummy_register
VMEStatusReg
MIAU_SelectSpydata register at ....0003a
DTCSCMIPUnit
MIAUSingleAssUnit
RPCMIPUnit
MIAUSingleAssUnit
DTCSCISOUnit
MIAUSingleAssUnit
RPCISOUnit
MIAUSingleAssUnit
ChipID
ChipIDRegisters
Chip ID and Revision
dummy_register
VMEStatusReg
Dummy register
bxcounter
BXCounter
BX counter (only the synchronization logic is used. the counter output is not used)
simu_logic
MIAUSimuLogic
Simulation Logic
vme_logic
InChipVMELogic
VME Logic
startup_dcm
StartupDCMVirtex2
Digital Clock Management & Chip Startup
Processes
register_inputs
Dependencies :
clk, reset
Description :
register inputs
register_dummy
Dependencies :
clk
Description :
Dummy signals
register_outputs
Dependencies :
clk, reset
register_inputs
Dependencies :
clk, reset
Description :
register inputs
sel_spy_bits
Dependencies :
clk
Description :
Select which input data to spy set by VME register MIAU_SelectSpydata
register_dummy
Dependencies :
clk
Description :
Dummy signals
register_outputs
Dependencies :
clk, reset
Generated by: taurokc@dsy-srv3 on Fri Aug 25 11:56:55 2006.