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entity ROPVMEInterfaceVME Interface Block for the whole GMT Board. Located in the ROP Chip. |
The VME Interface decodes the upper four bits (23 downto 20) of the VME address and generates the necessary vme_en signals for all the chips on the board.
The vme_en_xxx signals are asserted with a DSPULS. In write cycles a vme_en_xxx is a pulse of one clock cycle length. In read cycles the vme_en_xxx is cleared after a rising edge of DTACK or when the DSSYNC from VME64 is cleared.
For internal use in the ROP chip a vme_strobe_ROP is generated when reading and when writing. This is needed in the JTAGController since actions are triggered at the end of the strobe.
DTACK_EXT is set after a rising edge of the dtack pulses from the chips. It is cleared synchronously after a falling edge of DSSYNC or asynchronously with DSCYC.
Check: is it worth clearing the inteternal vme_en_signals already with the DTACK? Do we gain any speed?
Check: is it worth clearing the esternal DTACK asynchonously with DSCYC? Do we gain any speed?
(Taurok, Noebauer - 29/09/2005) vme_en_XXX are delayed by one tick to make them arrive well after the VME addresses
Diagrams : vme_waveforms.jpg VME Interface waveforms