entity SimuSpyLogic

Used Packages

• IEEE.Std_logic_1164 all
• IEEE.Numeric_std all
• work.ReadOutBufTypes all
• work.VMEMux all
• UNISIM.VCOMPONENTS all

Generics

• depth1k integer := 0
• nwords integer := 4
• simuspyconfig_reg_addr integer
• spydepth_reg_addr integer
• spyarmpulse_reg_addr integer
• spydone_reg_addr integer
• simuspyram_vme_base_address integer := 16#10000#

Ports

• iData in TReadoutData_vec(0 to nwords-1)
• iPreBCRes in std_logic
• iBCRes in std_logic
• oData out TReadoutData_vec(0 to nwords-1)
• oSimuMode out std_logic
• oDummyIsBCReset out std_logic
• vme_addr in std_logic_vector
• vme_data in std_logic_vector
• vme_en in std_logic
• vme_wr in std_logic
• vme_data_out out std_logic_vector(15 downto 0)
• vme_en_out out std_logic
• clk in std_logic
• reset in std_logic

Architectures

• behavioral