--***********************************************************************
--* @short      Types for signals inside the Logic FPGA
--***********************************************************************
--* @author  --*  H. Sakulin                HEPHY Vienna
--* @date    $Date: 2005/01/31 15:17:30 $
--* @version $Revision: 1.4 $
--***********************************************************************
--/

library IEEE;
use IEEE.Std_logic_1164.all;
use STD.TEXTIO.all;


package LFTypes is

constant NBits_SortRank : integer := 8;  -- number of bits in sort rank
  
type TEta_vec is array (integer range <>) of std_logic_vector(5 downto 0);

-- each std_logic_vector contains the idx of the matched RPC in one-hot encoding


end;


-- package body LFTypes is
-- end LFTypes;