--******************************************************************************
--* @short VME Address Map of Mip and Iso Assignment FPGA
--******************************************************************************
--* @author SAKULIN Hannes <hsakulin@dsy-srv3.cern.ch>
--* @version $Revision: 1.8 $
--* @date $Date: 2005/02/01 14:30:07 $
--******************************************************************************
--* NOTE: all addresses are in bytes (not words)
--/
package MIAUVMEAddrMap_test is
type AddrArr is array (0 to 3) of integer;
-------------------------------------------------------------------------------
-- Registers
-------------------------------------------------------------------------------
constant MIAU_chip_id0_raddr : integer := 16#00#; -- CHIP ID 0 r
constant MIAU_chip_id1_raddr : integer := 16#02#; -- CHIP ID 1 r
constant MIAU_chip_rev0_raddr : integer := 16#04#; -- CHIP rev 0 r
constant MIAU_chip_rev1_raddr : integer := 16#06#; -- CHIP rev 1 r
constant MIAU_dummy_raddr : integer := 16#20#;
constant MIAU_ReadoutSyncReg_addr : integer := 16#28#;
constant MIAU_SimuSpyConfig_addr : integer := 16#32#;
constant MIAU_SpyDepth_addr : integer := 16#34#;
constant MIAU_SpyArmPulse_waddr : integer := 16#36#;
constant MIAU_SpyDone_raddr : integer := 16#38#;
constant MIAU_SelectSpydata : integer := 16#3A#;
-------------------------------------------------------------------------------
-- Distributed RAM
-------------------------------------------------------------------------------
constant MIAU_DistrRam_base : integer := 16#00400#; -- start distributed RAM
-- blocks at 1k
constant MIAU_EtaConvLUT_size : integer := 128;
constant MIAU_EtaConvLUT_base : AddrArr := (
MIAU_DistrRam_base, -- MIP_DT / MIP_CSC
MIAU_DistrRam_base + MIAU_EtaConvLUT_size * 4, -- MIP_bRRPC / MIP_fRPC
MIAU_DistrRam_base + MIAU_EtaConvLUT_size * 8, -- ISO_DT / ISO_CSC
MIAU_DistrRam_base + MIAU_EtaConvLUT_size * 12 -- ISO_bRPC / ISO_fRPC
);
constant MIAU_SimuRAM_base : integer := 16#02000#; -- size : 4k addresses /
-- 8kB (2000hex)
-------------------------------------------------------------------------------
-- Block RAM
-------------------------------------------------------------------------------
constant MIAU_BlockRam_base : integer := 16#10000#; -- start block RAM blocks
-- at 64k
constant MIAU_PhiPro1LUT_size : integer := 4096;
constant MIAU_PhiPro1LUT_base : AddrArr := (
MIAU_BlockRam_base, -- MIP_DT / MIP_CSC
MIAU_BlockRam_base + MIAU_PhiPro1LUT_size * 4, -- MIP_bRRPC / MIP_fRPC
MIAU_BlockRam_base + MIAU_PhiPro1LUT_size * 8, -- ISO_DT / ISO_CSC
MIAU_BlockRam_base + MIAU_PhiPro1LUT_size * 12 -- ISO_bRPC / ISO_fRPC
);
constant MIAU_PhiPro2LUT_size : integer := 4096;
constant MIAU_PhiPro2LUT_base : AddrArr := (
MIAU_BlockRam_base + 16#10000#, -- MIP_DT / MIP_CSC
MIAU_BlockRam_base + 16#10000# + MIAU_PhiPro2LUT_size * 4, -- MIP_bRRPC / MIP_fRPC
MIAU_BlockRam_base + 16#10000# + MIAU_PhiPro2LUT_size * 8, -- ISO_DT / ISO_CSC
MIAU_BlockRam_base + 16#10000# + MIAU_PhiPro2LUT_size * 12 -- ISO_bRPC / ISO_fRPC
);
constant MIAU_EtaProLUT_size : integer := 8192;
constant MIAU_EtaProLUT_base : AddrArr := (
MIAU_BlockRam_base + 16#20000#, -- MIP_DT / MIP_CSC
MIAU_BlockRam_base + 16#20000# + MIAU_EtaProLUT_size * 4, -- MIP_bRRPC / MIP_fRPC
MIAU_BlockRam_base + 16#20000# + MIAU_EtaProLUT_size * 8, -- ISO_DT / ISO_CSC
MIAU_BlockRam_base + 16#20000# + MIAU_EtaProLUT_size * 12 -- ISO_bRPC / ISO_fRPC
);
-------------------------------------------------------------------------------
-- Block RAM for SPY memories in test version
-------------------------------------------------------------------------------
-- constant MIAU_BlockRam_base : integer := 16#10000#; -- start block RAM blocks
-- at 64k
end package MIAUVMEAddrMap_test;
package body MIAUVMEAddrMap_test is
end package body MIAUVMEAddrMap_test;