--******************************************************************************
--* @short Mip And Iso Assignment Unit (Barrel Chip)
--*
--* This wrapper just chnages the names of the MIP/ISO bits
--******************************************************************************
--* @author SAKULIN Hannes <hsakulin@dsy-srv3.cern.ch>
--* @date $Date: 2004/12/16 18:33:55 $
--* @version $Revision: 1.11 $
--******************************************************************************
--/
library IEEE;
use IEEE.Std_logic_1164.all;
use WORK.GMTTypes.all;
entity MipIsoAUbrlchip is
port (bRPCmu_AU : in TFourSyncedMu_flat;
DTmu_AU : in TFourSyncedMu_flat;
MQB3_45_0,
MQB3_45_2,
MQB3_45_8,
MQB3_45_10,
MQB4_45_4,
MQB4_45_6,
MQB7_45_0,
MQB7_45_2,
MQB7_45_8,
MQB7_45_10,
MQB8_45_4,
MQB8_45_6,
MQB11_45_0,
MQB11_45_2,
MQB11_45_8,
MQB11_45_10,
MQB12_45_4,
MQB12_45_6,
MQB1_23_1,
MQB1_23_3,
MQB1_23_9,
MQB1_23_11,
MQB2_23_5,
MQB2_23_7,
MQB5_23_1,
MQB5_23_3,
MQB5_23_9,
MQB5_23_11,
MQB6_23_5,
MQB6_23_7,
MQB9_23_1,
MQB9_23_3,
MQB9_23_9,
MQB9_23_11,
MQB10_23_5,
MQB10_23_7,
MQB1_23_0,
MQB1_23_2,
MQB1_23_8,
MQB1_23_10,
MQB2_23_4,
MQB2_23_6,
MQB5_23_0,
MQB5_23_2,
MQB5_23_8,
MQB5_23_10,
MQB6_23_4,
MQB6_23_6,
MQB9_23_0,
MQB9_23_2,
MQB9_23_8,
MQB9_23_10,
MQB10_23_4,
MQB10_23_6,
MQB1_01_1,
MQB1_01_3,
MQB1_01_9,
MQB1_01_11,
MQB2_01_5,
MQB2_01_7,
MQB5_01_1,
MQB5_01_3,
MQB5_01_9,
MQB5_01_11,
MQB6_01_5,
MQB6_01_7,
MQB9_01_1,
MQB9_01_3,
MQB9_01_9,
MQB9_01_11,
MQB10_01_5,
MQB10_01_7,
MQB1_01_0,
MQB1_01_2,
MQB1_01_8,
MQB1_01_10,
MQB2_01_4,
MQB2_01_6,
MQB5_01_0,
MQB5_01_2,
MQB5_01_8,
MQB5_01_10,
MQB6_01_4,
MQB6_01_6,
MQB9_01_0,
MQB9_01_2,
MQB9_01_8,
MQB9_01_10,
MQB10_01_4,
MQB10_01_6,
MQB1_01_4,
MQB1_01_6,
MQB2_01_0,
MQB2_01_2,
MQB2_01_8,
MQB2_01_10,
MQB5_01_4,
MQB5_01_6,
MQB6_01_0,
MQB6_01_2,
MQB6_01_8,
MQB6_01_10,
MQB9_01_4,
MQB9_01_6,
MQB10_01_0,
MQB10_01_2,
MQB10_01_8,
MQB10_01_10,
MQB1_01_5,
MQB1_01_7,
MQB2_01_1,
MQB2_01_3,
MQB2_01_9,
MQB2_01_11,
MQB5_01_5,
MQB5_01_7,
MQB6_01_1,
MQB6_01_3,
MQB6_01_9,
MQB6_01_11,
MQB9_01_5,
MQB9_01_7,
MQB10_01_1,
MQB10_01_3,
MQB10_01_9,
MQB10_01_11,
MQB1_23_4,
MQB1_23_6,
MQB2_23_0,
MQB2_23_2,
MQB2_23_8,
MQB2_23_10,
MQB5_23_4,
MQB5_23_6,
MQB6_23_0,
MQB6_23_2,
MQB6_23_8,
MQB6_23_10,
MQB9_23_4,
MQB9_23_6,
MQB10_23_0,
MQB10_23_2,
MQB10_23_8,
MQB10_23_10,
MQB1_23_5,
MQB1_23_7,
MQB2_23_1,
MQB2_23_3,
MQB2_23_9,
MQB2_23_11,
MQB5_23_5,
MQB5_23_7,
MQB6_23_1,
MQB6_23_3,
MQB6_23_9,
MQB6_23_11,
MQB9_23_5,
MQB9_23_7,
MQB10_23_1,
MQB10_23_3,
MQB10_23_9,
MQB10_23_11,
MQB3_45_4,
MQB3_45_6,
MQB4_45_0,
MQB4_45_2,
MQB4_45_8,
MQB4_45_10,
MQB7_45_4,
MQB7_45_6,
MQB8_45_0,
MQB8_45_2,
MQB8_45_8,
MQB8_45_10,
MQB11_45_4,
MQB11_45_6,
MQB12_45_0,
MQB12_45_2,
MQB12_45_8,
MQB12_45_10 : in std_logic;
bRPCisMIP,
DTisMIP,
bRPCisISO,
DTisISO : out std_logic_vector (0 to 3);
spare_AUB_LFB : out std_logic;
-- test outputs - for behavioral simu only
-- synthesis translate_off
oPhiSelBits : out TPhiSelBits_vec (0 to 15);
oEtaSelBits : out TEtaSelBits_vec (0 to 15);
-- synthesis translate_on
Dummy_AUB : in std_logic;
-- VME port
vme_addr : in std_logic_vector (19 downto 1);
vme_data : inout std_logic_vector (15 downto 0);
vme_en_AUB : in std_logic;
vme_wr_AUB : in std_logic;
vme_ndtack_AUB : out std_logic; -- low active
vme_nirq_AUB : out std_logic; -- low active
-- Clock and control
clk_AUB : in std_logic;
clk_test_AUB : out std_logic; -- clock1x from DCM
clk_out_AUB : out std_logic; -- clock output for feedback (use optional)
-- same as clk_test
clk_fb_AUB : in std_logic; -- clock feedback input (use optional)
dcm_locked_AUB : out std_logic; -- DCM is locked => goes to VME chip
reset_dcm : in std_logic; -- crate reset (crate reset button and after
-- power-up) => resets DCM
inactive : in std_logic; -- from front panel button (to GTS)
status_AUB : out std_logic_vector(1 downto 0);
test_AUB : out std_logic_vector(3 downto 0);
reset_AUB : in std_logic); -- hard reset from trigger control
--
-- register input
-- same function as level-1 reset
-- or hard reset from trigger control
--
-- generated by VME chip
-- resets only state machines, FFs,
-- counters, error flags
-- but not memories and registers
end;
architecture behavioral of MipIsoAUbrlchip is
attribute syn_useioff : boolean;
attribute syn_useioff of behavioral : architecture is true;
signal MQbrl : std_logic_vector(0 to 10*18-1);
begin
MQbrl(0) <= MQB3_45_0;
MQbrl(1) <= MQB3_45_2;
MQbrl(2) <= MQB3_45_8;
MQbrl(3) <= MQB3_45_10;
MQbrl(4) <= MQB4_45_4;
MQbrl(5) <= MQB4_45_6;
MQbrl(6) <= MQB7_45_0;
MQbrl(7) <= MQB7_45_2;
MQbrl(8) <= MQB7_45_8;
MQbrl(9) <= MQB7_45_10;
MQbrl(10) <= MQB8_45_4;
MQbrl(11) <= MQB8_45_6;
MQbrl(12) <= MQB11_45_0;
MQbrl(13) <= MQB11_45_2;
MQbrl(14) <= MQB11_45_8;
MQbrl(15) <= MQB11_45_10;
MQbrl(16) <= MQB12_45_4;
MQbrl(17) <= MQB12_45_6;
MQbrl(18) <= MQB1_23_1;
MQbrl(19) <= MQB1_23_3;
MQbrl(20) <= MQB1_23_9;
MQbrl(21) <= MQB1_23_11;
MQbrl(22) <= MQB2_23_5;
MQbrl(23) <= MQB2_23_7;
MQbrl(24) <= MQB5_23_1;
MQbrl(25) <= MQB5_23_3;
MQbrl(26) <= MQB5_23_9;
MQbrl(27) <= MQB5_23_11;
MQbrl(28) <= MQB6_23_5;
MQbrl(29) <= MQB6_23_7;
MQbrl(30) <= MQB9_23_1;
MQbrl(31) <= MQB9_23_3;
MQbrl(32) <= MQB9_23_9;
MQbrl(33) <= MQB9_23_11;
MQbrl(34) <= MQB10_23_5;
MQbrl(35) <= MQB10_23_7;
MQbrl(36) <= MQB1_23_0;
MQbrl(37) <= MQB1_23_2;
MQbrl(38) <= MQB1_23_8;
MQbrl(39) <= MQB1_23_10;
MQbrl(40) <= MQB2_23_4;
MQbrl(41) <= MQB2_23_6;
MQbrl(42) <= MQB5_23_0;
MQbrl(43) <= MQB5_23_2;
MQbrl(44) <= MQB5_23_8;
MQbrl(45) <= MQB5_23_10;
MQbrl(46) <= MQB6_23_4;
MQbrl(47) <= MQB6_23_6;
MQbrl(48) <= MQB9_23_0;
MQbrl(49) <= MQB9_23_2;
MQbrl(50) <= MQB9_23_8;
MQbrl(51) <= MQB9_23_10;
MQbrl(52) <= MQB10_23_4;
MQbrl(53) <= MQB10_23_6;
MQbrl(54) <= MQB1_01_1;
MQbrl(55) <= MQB1_01_3;
MQbrl(56) <= MQB1_01_9;
MQbrl(57) <= MQB1_01_11;
MQbrl(58) <= MQB2_01_5;
MQbrl(59) <= MQB2_01_7;
MQbrl(60) <= MQB5_01_1;
MQbrl(61) <= MQB5_01_3;
MQbrl(62) <= MQB5_01_9;
MQbrl(63) <= MQB5_01_11;
MQbrl(64) <= MQB6_01_5;
MQbrl(65) <= MQB6_01_7;
MQbrl(66) <= MQB9_01_1;
MQbrl(67) <= MQB9_01_3;
MQbrl(68) <= MQB9_01_9;
MQbrl(69) <= MQB9_01_11;
MQbrl(70) <= MQB10_01_5;
MQbrl(71) <= MQB10_01_7;
MQbrl(72) <= MQB1_01_0;
MQbrl(73) <= MQB1_01_2;
MQbrl(74) <= MQB1_01_8;
MQbrl(75) <= MQB1_01_10;
MQbrl(76) <= MQB2_01_4;
MQbrl(77) <= MQB2_01_6;
MQbrl(78) <= MQB5_01_0;
MQbrl(79) <= MQB5_01_2;
MQbrl(80) <= MQB5_01_8;
MQbrl(81) <= MQB5_01_10;
MQbrl(82) <= MQB6_01_4;
MQbrl(83) <= MQB6_01_6;
MQbrl(84) <= MQB9_01_0;
MQbrl(85) <= MQB9_01_2;
MQbrl(86) <= MQB9_01_8;
MQbrl(87) <= MQB9_01_10;
MQbrl(88) <= MQB10_01_4;
MQbrl(89) <= MQB10_01_6;
MQbrl(90) <= MQB1_01_4;
MQbrl(91) <= MQB1_01_6;
MQbrl(92) <= MQB2_01_0;
MQbrl(93) <= MQB2_01_2;
MQbrl(94) <= MQB2_01_8;
MQbrl(95) <= MQB2_01_10;
MQbrl(96) <= MQB5_01_4;
MQbrl(97) <= MQB5_01_6;
MQbrl(98) <= MQB6_01_0;
MQbrl(99) <= MQB6_01_2;
MQbrl(100) <= MQB6_01_8;
MQbrl(101) <= MQB6_01_10;
MQbrl(102) <= MQB9_01_4;
MQbrl(103) <= MQB9_01_6;
MQbrl(104) <= MQB10_01_0;
MQbrl(105) <= MQB10_01_2;
MQbrl(106) <= MQB10_01_8;
MQbrl(107) <= MQB10_01_10;
MQbrl(108) <= MQB1_01_5;
MQbrl(109) <= MQB1_01_7;
MQbrl(110) <= MQB2_01_1;
MQbrl(111) <= MQB2_01_3;
MQbrl(112) <= MQB2_01_9;
MQbrl(113) <= MQB2_01_11;
MQbrl(114) <= MQB5_01_5;
MQbrl(115) <= MQB5_01_7;
MQbrl(116) <= MQB6_01_1;
MQbrl(117) <= MQB6_01_3;
MQbrl(118) <= MQB6_01_9;
MQbrl(119) <= MQB6_01_11;
MQbrl(120) <= MQB9_01_5;
MQbrl(121) <= MQB9_01_7;
MQbrl(122) <= MQB10_01_1;
MQbrl(123) <= MQB10_01_3;
MQbrl(124) <= MQB10_01_9;
MQbrl(125) <= MQB10_01_11;
MQbrl(126) <= MQB1_23_4;
MQbrl(127) <= MQB1_23_6;
MQbrl(128) <= MQB2_23_0;
MQbrl(129) <= MQB2_23_2;
MQbrl(130) <= MQB2_23_8;
MQbrl(131) <= MQB2_23_10;
MQbrl(132) <= MQB5_23_4;
MQbrl(133) <= MQB5_23_6;
MQbrl(134) <= MQB6_23_0;
MQbrl(135) <= MQB6_23_2;
MQbrl(136) <= MQB6_23_8;
MQbrl(137) <= MQB6_23_10;
MQbrl(138) <= MQB9_23_4;
MQbrl(139) <= MQB9_23_6;
MQbrl(140) <= MQB10_23_0;
MQbrl(141) <= MQB10_23_2;
MQbrl(142) <= MQB10_23_8;
MQbrl(143) <= MQB10_23_10;
MQbrl(144) <= MQB1_23_5;
MQbrl(145) <= MQB1_23_7;
MQbrl(146) <= MQB2_23_1;
MQbrl(147) <= MQB2_23_3;
MQbrl(148) <= MQB2_23_9;
MQbrl(149) <= MQB2_23_11;
MQbrl(150) <= MQB5_23_5;
MQbrl(151) <= MQB5_23_7;
MQbrl(152) <= MQB6_23_1;
MQbrl(153) <= MQB6_23_3;
MQbrl(154) <= MQB6_23_9;
MQbrl(155) <= MQB6_23_11;
MQbrl(156) <= MQB9_23_5;
MQbrl(157) <= MQB9_23_7;
MQbrl(158) <= MQB10_23_1;
MQbrl(159) <= MQB10_23_3;
MQbrl(160) <= MQB10_23_9;
MQbrl(161) <= MQB10_23_11;
MQbrl(162) <= MQB3_45_4;
MQbrl(163) <= MQB3_45_6;
MQbrl(164) <= MQB4_45_0;
MQbrl(165) <= MQB4_45_2;
MQbrl(166) <= MQB4_45_8;
MQbrl(167) <= MQB4_45_10;
MQbrl(168) <= MQB7_45_4;
MQbrl(169) <= MQB7_45_6;
MQbrl(170) <= MQB8_45_0;
MQbrl(171) <= MQB8_45_2;
MQbrl(172) <= MQB8_45_8;
MQbrl(173) <= MQB8_45_10;
MQbrl(174) <= MQB11_45_4;
MQbrl(175) <= MQB11_45_6;
MQbrl(176) <= MQB12_45_0;
MQbrl(177) <= MQB12_45_2;
MQbrl(178) <= MQB12_45_8;
MQbrl(179) <= MQB12_45_10;
theChip: entity work.MipIsoAUbrl
port map (
bRPCmu_AU => bRPCmu_AU,
DTmu_AU => DTmu_AU,
bMQbits => MQbrl,
bRPCisMIP => bRPCisMIP,
DTisMIP => DTisMIP,
bRPCisISO => bRPCisISO,
DTisISO => DTisISO,
spare_AUB_LFB => spare_AUB_LFB,
-- synthesis translate_off
oPhiSelBits => oPhiSelBits,
oEtaSelBits => oEtaSelBits,
-- synthesis translate_on
Dummy_AUB => Dummy_AUB,
vme_addr => vme_addr,
vme_data => vme_data,
vme_en_AUB => vme_en_AUB,
vme_wr_AUB => vme_wr_AUB,
vme_ndtack_AUB => vme_ndtack_AUB,
vme_nirq_AUB => vme_nirq_AUB,
clk_AUB => clk_AUB,
clk_test_AUB => clk_test_AUB,
clk_out_AUB => clk_out_AUB,
clk_fb_AUB => clk_fb_AUB,
dcm_locked_AUB => dcm_locked_AUB,
reset_dcm => reset_dcm,
inactive => inactive,
status_AUB => status_AUB,
test_AUB => test_AUB,
reset_AUB => reset_AUB);
end architecture behavioral;