--******************************************************************************
--* @short VME Address Map of Input FPGA
--*
--* all addresses are in bytes (not words)
--******************************************************************************
--* @author SAKULIN Hannes <hsakulin@dsy-srv3.cern.ch>
--* @date $Date: 2005/01/31 13:43:59 $
--* @version $Revision: 1.6 $
--******************************************************************************
--/
package SFVMEAddrMap is
type TBaseArray is array (integer range<>) of integer;
-------------------------------------------------------------------------------
-- Registers
-------------------------------------------------------------------------------
constant SF_chip_id0_raddr : integer := 16#00#; -- CHIP ID 0 r
constant SF_chip_id1_raddr : integer := 16#02#; -- CHIP ID 1 r
constant SF_chip_rev0_raddr : integer := 16#04#; -- CHIP rev 0 r
constant SF_chip_rev1_raddr : integer := 16#06#; -- CHIP rev 1 r
constant SF_ReadoutSyncReg_addr : integer := 16#20#;
constant SF_LATDelayReg_addr : integer := 16#22#;
constant SF_SimuSpyConfig_addr : integer := 16#24#;
constant SF_SpyDepth_addr : integer := 16#26#;
constant SF_SpyArmPulse_waddr : integer := 16#28#;
constant SF_SpyDone_raddr : integer := 16#30#;
constant SF_dummy_raddr : integer := 16#32#;
-------------------------------------------------------------------------------
-- Distributed RAM blocks
-------------------------------------------------------------------------------
constant SF_DistrRam_base : integer := 16#00400#; -- start distributed RAM
-- at 1k
-------------------------------------------------------------------------------
-- Block RAM blocks
-------------------------------------------------------------------------------
constant SF_BlockRam_base : integer := 16#10000#; -- start block RAM blocks
-- -- at 64k
constant SF_SimuSpyRAM_base : integer := SF_BlockRam_base;
end package SFVMEAddrMap;
package body SFVMEAddrMap is
end package body SFVMEAddrMap;