Index
Annotated List
Hierarchy
Deep Hierarchy
Package Documentation
Files
entity jtag_ctrl
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Sourcefile...
Used Packages
IEEE.std_logic_1164
all
IEEE.numeric_std
all
altera.maxplus2
ALL
Ports
addr
in std_logic_vector(3 downto 1)
data
inout std_logic_vector(7 downto 0)
clk
in std_logic
en_jtag
in std_logic
write
in std_logic
nsysres
in std_logic
dtack
out std_logic
tck_0
out std_logic
tck_1
out std_logic
tms_0
out std_logic
tms_1
out std_logic
tdo_0
out std_logic
tdo_1
out std_logic
tdi_0
in std_logic
tdi_1
in std_logic
Architectures
rtl
Generated by: taurokc@dsy-srv3 on Fri Aug 25 11:56:55 2006.